mirror of
https://github.com/54shady/kernel_drivers_examples.git
synced 2026-01-13 16:02:37 +00:00
282 lines
5.8 KiB
Markdown
282 lines
5.8 KiB
Markdown
# LCD驱动
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## EDP
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EDP(LP079QX1)时序如下图
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lcd panel在dts中的描述
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panel: panel {
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compatible = "simple-panel";
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backlight = <&backlight>;
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power-supply = <&vcc_lcd>;
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enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
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prepare-delay-ms = <20>;
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enable-delay-ms = <20>;
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display-timings {
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native-mode = <&timing0>;
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timing0: timing0 {
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clock-frequency = <200000000>;
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hactive = <1536>;
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vactive = <2048>;
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hfront-porch = <12>;
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hsync-len = <16>;
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hback-porch = <48>;
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vfront-porch = <8>;
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vsync-len = <4>;
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vback-porch = <8>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <0>;
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pixelclk-active = <0>;
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};
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};
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ports {
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panel_in: endpoint {
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remote-endpoint = <&edp_out>;
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};
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};
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};
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背光配置
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&backlight {
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status = "okay";
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enable-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
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};
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LCD电源配置
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vcc_lcd: vcc-lcd {
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compatible = "regulator-fixed";
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regulator-name = "vcc_lcd";
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gpio = <&gpio4 30 GPIO_ACTIVE_HIGH>;
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startup-delay-us = <20000>;
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enable-active-high;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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vin-supply = <&vcc5v0_sys>;
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};
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### 配置VOPB->eDP->Panel(vopl:ff8f0000, vopb:ff900000)
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配置VOPB->eDP
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&edp_in_vopl {
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status = "disabled";
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};
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&edp_in_vopb {
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status = "okay";
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};
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&route_edp {
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connect = <&vopb_out_edp>;
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status = "okay";
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};
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配置eDP->Panel
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&edp {
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status = "okay";
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force-hpd;
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ports {
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port@1 {
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reg = <1>;
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edp_out: endpoint {
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remote-endpoint = <&panel_in>;
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};
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};
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};
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};
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panel: panel {
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ports {
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panel_in: endpoint {
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remote-endpoint = <&edp_out>;
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};
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};
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};
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### 调试相关
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查看当前显示信息
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[root@rk3399:/]# cat /sys/kernel/debug/dri/0/summary
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VOP [ff900000.vop]: ACTIVE
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Connector: eDP
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overlay_mode[0] bus_format[1009] output_mode[f] color_space[0]
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Display mode: 1536x2048p60
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clk[200000] real_clk[200000] type[0] flag[a]
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H: 1536 1548 1564 1612
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V: 2048 2056 2060 2068
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win0-0: ACTIVE
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format: AR24 little-endian (0x34325241) SDR[0] color_space[0]
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csc: y2r[0] r2r[0] r2y[0] csc mode[0]
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zpos: 0
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src: pos[0x0] rect[1536x2048]
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dst: pos[0x0] rect[1536x2048]
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buf[0]: addr: 0x0000000000cdd000 pitch: 6144 offset: 0
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win1-0: DISABLED
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win2-0: DISABLED
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win2-1: DISABLED
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win2-2: DISABLED
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win2-3: DISABLED
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win3-0: DISABLED
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win3-1: DISABLED
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win3-2: DISABLED
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win3-3: DISABLED
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post: sdr2hdr[0] hdr2sdr[0]
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pre : sdr2hdr[0]
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post CSC: r2y[0] y2r[0] CSC mode[1]
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VOP [ff8f0000.vop]: DISABLED
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## MIPI
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MIPI(sitronix,st7703)
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panel和dsi配置
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&dsi {
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status = "okay";
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panel@0 {
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compatible = "sitronix,st7703", "simple-panel-dsi";
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status = "okay";
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reg = <0>;
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backlight = <&backlight>;
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prepare-delay-ms = <2>;
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reset-delay-ms = <1>;
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init-delay-ms = <20>;
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enable-delay-ms = <120>;
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disable-delay-ms = <50>;
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unprepare-delay-ms = <20>;
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enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
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width-mm = <68>;
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height-mm = <121>;
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dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
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MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
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dsi,format = <MIPI_DSI_FMT_RGB888>;
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dsi,lanes = <4>;
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panel-init-sequence = [
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05 fa 01 11
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39 00 04 b9 f1 12 83
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39 00 1c ba 33 81 05 f9 0e 0e 00 00 00
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00 00 00 00 00 44 25 00 91 0a
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00 00 02 4f 01 00 00 37
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15 00 02 b8 25
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39 00 04 bf 02 11 00
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39 00 0b b3 0c 10 0a 50 03 ff 00 00 00
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00
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39 00 0a c0 73 73 50 50 00 00 08 70 00
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15 00 02 bc 46
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15 00 02 cc 0b
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15 00 02 b4 80
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39 00 04 b2 c8 12 30
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39 00 0f e3 07 07 0b 0b 03 0b 00 00 00
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00 ff 00 c0 10
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39 00 0d c1 53 00 1e 1e 77 e1 cc dd 67
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77 33 33
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39 00 07 c6 00 00 ff ff 01 ff
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39 00 03 b5 09 09
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39 00 03 b6 87 95
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39 00 40 e9 c2 10 05 05 10 05 a0 12 31
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23 3f 81 0a a0 37 18 00 80 01
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00 00 00 00 80 01 00 00 00 48
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f8 86 42 08 88 88 80 88 88 88
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58 f8 87 53 18 88 88 81 88 88
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88 00 00 00 01 00 00 00 00 00
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00 00 00 00
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39 00 3e ea 00 1a 00 00 00 00 02 00 00
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00 00 00 1f 88 81 35 78 88 88
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85 88 88 88 0f 88 80 24 68 88
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88 84 88 88 88 23 10 00 00 1c
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00 00 00 00 00 00 00 00 00 00
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00 00 00 00 00 30 05 a0 00 00
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00 00
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39 00 23 e0 00 06 08 2a 31 3f 38 36 07
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0c 0d 11 13 12 13 11 18 00 06
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08 2a 31 3f 38 36 07 0c 0d 11
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13 12 13 11 18
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05 32 01 29
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];
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panel-exit-sequence = [
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05 00 01 28
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05 00 01 10
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];
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display-timings {
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native-mode = <&timing0>;
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timing0: timing0 {
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clock-frequency = <64000000>;
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hactive = <720>;
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vactive = <1280>;
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hfront-porch = <40>;
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hsync-len = <10>;
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hback-porch = <40>;
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vfront-porch = <22>;
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vsync-len = <4>;
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vback-porch = <11>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <0>;
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pixelclk-active = <0>;
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};
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};
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};
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};
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### 配置VOPL->DSI->Panel(vopl:ff8f0000, vopb:ff900000)
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&dsi_in_vopl {
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status = "okay";
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};
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&dsi_in_vopb {
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status = "disabled";
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};
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&route_dsi {
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status = "okay";
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};
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### 调试相关
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查看当前显示信息
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[root@rk3399 ~]# cat /sys/kernel/debug/dri/0/summary
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VOP [ff900000.vop]: DISABLED
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VOP [ff8f0000.vop]: ACTIVE
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Connector: DSI
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overlay_mode[0] bus_format[100a] output_mode[0] color_space[0]
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Display mode: 720x1280p60
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clk[64000] real_clk[64000] type[8] flag[a]
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H: 720 760 770 810
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V: 1280 1302 1306 1317
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win0-0: ACTIVE
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format: XR24 little-endian (0x34325258) SDR[0] color_space[0]
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csc: y2r[0] r2r[0] r2y[0] csc mode[0]
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zpos: 0
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src: pos[0x0] rect[720x1280]
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dst: pos[0x0] rect[720x1280]
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buf[0]: addr: 0x0000000000384000 pitch: 2880 offset: 0
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win2-0: DISABLED
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win2-1: DISABLED
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win2-2: DISABLED
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win2-3: DISABLED
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post: sdr2hdr[0] hdr2sdr[0]
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pre : sdr2hdr[0]
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post CSC: r2y[0] y2r[0] CSC mode[1]
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