mirror of
https://github.com/54shady/kernel_drivers_examples.git
synced 2026-01-13 16:02:37 +00:00
refine code format
This commit is contained in:
zeroway
@ -20,33 +20,6 @@
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#include <linux/irq.h>
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#include "es8323.h"
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#define es8323_DEF_VOL 0x20
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#define INVALID_GPIO -1
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#define ES8323_CODEC_SET_SPK 1
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#define ES8323_CODEC_SET_HP 2
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#define ES8323_RATES SNDRV_PCM_RATE_8000_96000
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#define ES8323_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
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SNDRV_PCM_FMTBIT_S24_LE)
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/* chip data */
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struct es8323_chip {
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/* alway include these two member */
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struct device *dev;
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struct i2c_client *client;
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/* sys clock */
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unsigned int sysclk;
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struct snd_pcm_hw_constraint_list *sysclk_constraints;
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int spk_ctl_gpio; /* speak control gpio */
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int hp_ctl_gpio; /* headphone control gpio*/
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int hp_det_gpio; /* headphone detect gpio */
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bool spk_gpio_level;
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bool hp_gpio_level;
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bool hp_det_level;
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};
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/* global chip point */
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struct es8323_chip *g_chip;
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@ -245,14 +218,6 @@ static int es8323_pcm_startup(struct snd_pcm_substream *substream, struct snd_so
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return 0;
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}
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struct _coeff_div {
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u32 mclk;
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u32 rate;
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u16 fs;
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u8 sr:4;
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u8 usb:1;
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};
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/* codec hifi mclk clock divider coefficients */
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static const struct _coeff_div coeff_div[] = {
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/* 8k */
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@ -387,11 +352,11 @@ static int es8323_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
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/* set master/slave audio interface */
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBM_CFM: // MASTER MODE
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printk("es8323 in master mode");
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printk("es8323 in master mode\n");
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iface |= 0x80;
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break;
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case SND_SOC_DAIFMT_CBS_CFS: // SLAVE MODE
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printk("es8323 in slave mode");
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printk("es8323 in slave mode\n");
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iface &= 0x7F;
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break;
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default:
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@ -403,6 +368,7 @@ static int es8323_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
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case SND_SOC_DAIFMT_I2S:
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adciface &= 0xFC;
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daciface &= 0xF9;
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printk("I2S FORMAT\n");
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break;
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case SND_SOC_DAIFMT_RIGHT_J:
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break;
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@ -419,21 +385,25 @@ static int es8323_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
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/* clock inversion */
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switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
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case SND_SOC_DAIFMT_NB_NF:
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printk("NORMAL BCLK and NORMAL FRAME\n");
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iface &= 0xDF;
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adciface &= 0xDF;
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daciface &= 0xBF;
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break;
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case SND_SOC_DAIFMT_IB_IF:
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printk("INVERT BCLK and INVERT FRAME\n");
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iface |= 0x20;
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adciface |= 0x20;
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daciface |= 0x40;
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break;
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case SND_SOC_DAIFMT_IB_NF:
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printk("INVERT BCLK and NORMAL FRAME\n");
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iface |= 0x20;
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adciface &= 0xDF;
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daciface &= 0xBF;
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break;
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case SND_SOC_DAIFMT_NB_IF:
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printk("NORMAL BCLK and INVERT FRAME\n");
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iface &= 0xDF;
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adciface |= 0x20;
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daciface |= 0x40;
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@ -557,22 +527,22 @@ static int es8323_mute(struct snd_soc_dai *dai, int mute)
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printk("%s, %d mute = %d\n", __FUNCTION__, __LINE__, mute);
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if (mute)
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{
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es8323_set_gpio(ES8323_CODEC_SET_SPK,!chip->spk_gpio_level);
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es8323_set_gpio(ES8323_CODEC_SET_HP,!chip->hp_gpio_level);
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es8323_set_gpio(ES8323_CODEC_SET_SPK, !chip->spk_gpio_level);
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es8323_set_gpio(ES8323_CODEC_SET_HP, !chip->hp_gpio_level);
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msleep(100);
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snd_soc_write(codec, ES8323_DACCONTROL3, 0x06);
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}
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else
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{
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snd_soc_write(codec, ES8323_DACCONTROL3, 0x02);
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snd_soc_write(codec, 0x30,es8323_DEF_VOL);
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snd_soc_write(codec, 0x31,es8323_DEF_VOL);
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snd_soc_write(codec, 0x30, ES8323_DEF_VOL);
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snd_soc_write(codec, 0x31, ES8323_DEF_VOL);
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msleep(130);
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if(chip->hp_det_level != gpio_get_value(chip->hp_det_gpio))
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es8323_set_gpio(ES8323_CODEC_SET_SPK,chip->spk_gpio_level);
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es8323_set_gpio(ES8323_CODEC_SET_SPK, chip->spk_gpio_level);
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else
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es8323_set_gpio(ES8323_CODEC_SET_HP,chip->hp_gpio_level);
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es8323_set_gpio(ES8323_CODEC_SET_HP, chip->hp_gpio_level);
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msleep(150);
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}
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@ -718,7 +688,6 @@ int gpio_setup(struct es8323_chip *chip, struct i2c_client *client)
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static irqreturn_t hp_det_irq_handler(int irq, void *dev_id)
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{
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/* disable irq */
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return IRQ_HANDLED;
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}
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167
debug/codec/es8323.h
Executable file
167
debug/codec/es8323.h
Executable file
@ -0,0 +1,167 @@
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#ifndef _ES8323_H
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#define _ES8323_H
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#define CONFIG_HHTECH_MINIPMP 1
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/* ES8323 register space */
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#define ES8323_CONTROL1 0x00
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#define ES8323_CONTROL2 0x01
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#define ES8323_CHIPPOWER 0x02
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#define ES8323_ADCPOWER 0x03
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#define ES8323_DACPOWER 0x04
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#define ES8323_CHIPLOPOW1 0x05
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#define ES8323_CHIPLOPOW2 0x06
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#define ES8323_ANAVOLMANAG 0x07
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#define ES8323_MASTERMODE 0x08
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#define ES8323_ADCCONTROL1 0x09
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#define ES8323_ADCCONTROL2 0x0a
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#define ES8323_ADCCONTROL3 0x0b
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#define ES8323_ADCCONTROL4 0x0c
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#define ES8323_ADCCONTROL5 0x0d
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#define ES8323_ADCCONTROL6 0x0e
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#define ES8323_ADCCONTROL7 0x0f
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#define ES8323_ADCCONTROL8 0x10
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#define ES8323_ADCCONTROL9 0x11
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#define ES8323_ADCCONTROL10 0x12
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#define ES8323_ADCCONTROL11 0x13
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#define ES8323_ADCCONTROL12 0x14
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#define ES8323_ADCCONTROL13 0x15
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#define ES8323_ADCCONTROL14 0x16
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#define ES8323_DACCONTROL1 0x17
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#define ES8323_DACCONTROL2 0x18
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#define ES8323_DACCONTROL3 0x19
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#define ES8323_DACCONTROL4 0x1a
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#define ES8323_DACCONTROL5 0x1b
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#define ES8323_DACCONTROL6 0x1c
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#define ES8323_DACCONTROL7 0x1d
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#define ES8323_DACCONTROL8 0x1e
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#define ES8323_DACCONTROL9 0x1f
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#define ES8323_DACCONTROL10 0x20
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#define ES8323_DACCONTROL11 0x21
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#define ES8323_DACCONTROL12 0x22
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#define ES8323_DACCONTROL13 0x23
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#define ES8323_DACCONTROL14 0x24
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#define ES8323_DACCONTROL15 0x25
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#define ES8323_DACCONTROL16 0x26
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#define ES8323_DACCONTROL17 0x27
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#define ES8323_DACCONTROL18 0x28
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#define ES8323_DACCONTROL19 0x29
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#define ES8323_DACCONTROL20 0x2a
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#define ES8323_DACCONTROL21 0x2b
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#define ES8323_DACCONTROL22 0x2c
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#define ES8323_DACCONTROL23 0x2d
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#define ES8323_DACCONTROL24 0x2e
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#define ES8323_DACCONTROL25 0x2f
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#define ES8323_DACCONTROL26 0x30
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#define ES8323_DACCONTROL27 0x31
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#define ES8323_DACCONTROL28 0x32
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#define ES8323_DACCONTROL29 0x33
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#define ES8323_DACCONTROL30 0x34
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#define ES8323_LADC_VOL ES8323_ADCCONTROL8
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#define ES8323_RADC_VOL ES8323_ADCCONTROL9
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#define ES8323_LDAC_VOL ES8323_DACCONTROL4
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#define ES8323_RDAC_VOL ES8323_DACCONTROL5
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#define ES8323_LOUT1_VOL ES8323_DACCONTROL24
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#define ES8323_ROUT1_VOL ES8323_DACCONTROL25
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#define ES8323_LOUT2_VOL ES8323_DACCONTROL26
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#define ES8323_ROUT2_VOL ES8323_DACCONTROL27
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#define ES8323_ADC_MUTE ES8323_ADCCONTROL7
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#define ES8323_DAC_MUTE ES8323_DACCONTROL3
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#define ES8323_IFACE ES8323_MASTERMODE
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#define ES8323_ADC_IFACE ES8323_ADCCONTROL4
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#define ES8323_ADC_SRATE ES8323_ADCCONTROL5
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#define ES8323_DAC_IFACE ES8323_DACCONTROL1
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#define ES8323_DAC_SRATE ES8323_DACCONTROL2
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#define ES8323_CACHEREGNUM 53
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#define ES8323_SYSCLK 0
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#define ES8323_PLL1 0
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#define ES8323_PLL2 1
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/* clock inputs */
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#define ES8323_MCLK 0
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#define ES8323_PCMCLK 1
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/* clock divider id's */
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#define ES8323_PCMDIV 0
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#define ES8323_BCLKDIV 1
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#define ES8323_VXCLKDIV 2
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/* PCM clock dividers */
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#define ES8323_PCM_DIV_1 (0 << 6)
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#define ES8323_PCM_DIV_3 (2 << 6)
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#define ES8323_PCM_DIV_5_5 (3 << 6)
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#define ES8323_PCM_DIV_2 (4 << 6)
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#define ES8323_PCM_DIV_4 (5 << 6)
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#define ES8323_PCM_DIV_6 (6 << 6)
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#define ES8323_PCM_DIV_8 (7 << 6)
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/* BCLK clock dividers */
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#define ES8323_BCLK_DIV_1 (0 << 7)
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#define ES8323_BCLK_DIV_2 (1 << 7)
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#define ES8323_BCLK_DIV_4 (2 << 7)
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#define ES8323_BCLK_DIV_8 (3 << 7)
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/* VXCLK clock dividers */
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#define ES8323_VXCLK_DIV_1 (0 << 6)
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#define ES8323_VXCLK_DIV_2 (1 << 6)
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#define ES8323_VXCLK_DIV_4 (2 << 6)
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#define ES8323_VXCLK_DIV_8 (3 << 6)
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#define ES8323_VXCLK_DIV_16 (4 << 6)
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#define ES8323_DAI_HIFI 0
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#define ES8323_DAI_VOICE 1
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#define ES8323_1536FS 1536
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#define ES8323_1024FS 1024
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#define ES8323_768FS 768
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#define ES8323_512FS 512
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#define ES8323_384FS 384
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#define ES8323_256FS 256
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#define ES8323_128FS 128
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/* chip data */
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struct es8323_chip {
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/* alway include these two member */
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struct device *dev;
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struct i2c_client *client;
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/* sys clock */
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unsigned int sysclk;
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struct snd_pcm_hw_constraint_list *sysclk_constraints;
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int spk_ctl_gpio; /* speak control gpio */
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int hp_ctl_gpio; /* headphone control gpio*/
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int hp_det_gpio; /* headphone detect gpio */
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bool spk_gpio_level;
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bool hp_gpio_level;
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bool hp_det_level;
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};
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#define ES8323_DEF_VOL 0x20
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#define INVALID_GPIO -1
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#define ES8323_CODEC_SET_SPK 1
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#define ES8323_CODEC_SET_HP 2
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#define ES8323_RATES SNDRV_PCM_RATE_8000_96000
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#define ES8323_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
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SNDRV_PCM_FMTBIT_S24_LE)
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struct _coeff_div {
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u32 mclk;
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u32 rate;
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u16 fs;
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u8 sr:4;
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u8 usb:1;
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};
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#endif
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