x86: Check all 0s/1s vectors with standard_sse_constant_p

commit 77473a27ba
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Thu Jun 26 06:08:51 2025 +0800

    x86: Also handle all 1s float vector constant

replaces

(insn 29 28 30 5 (set (reg:V2SF 107)
        (mem/u/c:V2SF (symbol_ref/u:DI ("*.LC0") [flags 0x2]) [0  S8 A64])) 2031 {*movv2sf_internal}
     (expr_list:REG_EQUAL (const_vector:V2SF [
                (const_double:SF -QNaN [-QNaN]) repeated x2
            ])
        (nil)))

with

(insn 98 13 14 3 (set (reg:V8QI 112)
        (const_vector:V8QI [
                (const_int -1 [0xffffffffffffffff]) repeated x8
            ])) -1
     (nil))
...
(insn 29 28 30 5 (set (reg:V2SF 107)
        (subreg:V2SF (reg:V8QI 112) 0)) 2031 {*movv2sf_internal}
     (expr_list:REG_EQUAL (const_vector:V2SF [
                (const_double:SF -QNaN [-QNaN]) repeated x2
            ])
        (nil)))

which leads to

pr121015.c: In function ‘render_result_from_bake_h’:
pr121015.c:34:1: error: unrecognizable insn:
   34 | }
      | ^
(insn 98 13 14 3 (set (reg:V8QI 112)
        (const_vector:V8QI [
                (const_int -1 [0xffffffffffffffff]) repeated x8
            ])) -1
     (expr_list:REG_EQUIV (const_vector:V8QI [
                (const_int -1 [0xffffffffffffffff]) repeated x8
            ])
        (nil)))
during RTL pass: ira

Check all 0s/1s vectors with standard_sse_constant_p to avoid unsupported
all 1s vectors.

Co-Developed-by: H.J. Lu <hjl.tools@gmail.com>

gcc/

	PR target/121015
	* config/i386/i386-features.cc (ix86_broadcast_inner): Check all
	0s/1s vectors with standard_sse_constant_p.

gcc/testsuite/

	PR target/121015
	* gcc.target/i386/pr121015.c: New test.
This commit is contained in:
Uros Bizjak
2025-07-14 17:16:36 +08:00
committed by H.J. Lu
parent 07d8de9174
commit dc07752af0
2 changed files with 37 additions and 7 deletions

View File

@ -3534,22 +3534,20 @@ ix86_broadcast_inner (rtx op, machine_mode mode,
machine_mode *scalar_mode_p,
x86_cse_kind *kind_p, rtx_insn **insn_p)
{
if (op == const0_rtx || op == CONST0_RTX (mode))
switch (standard_sse_constant_p (op, mode))
{
case 1:
*scalar_mode_p = QImode;
*kind_p = X86_CSE_CONST0_VECTOR;
*insn_p = nullptr;
return const0_rtx;
}
else if ((GET_MODE_CLASS (mode) == MODE_VECTOR_INT
&& (op == constm1_rtx || op == CONSTM1_RTX (mode)))
|| (GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
&& float_vector_all_ones_operand (op, mode)))
{
case 2:
*scalar_mode_p = QImode;
*kind_p = X86_CSE_CONSTM1_VECTOR;
*insn_p = nullptr;
return constm1_rtx;
default:
break;
}
mode = GET_MODE (op);

View File

@ -0,0 +1,32 @@
/* { dg-do compile } */
/* { dg-options "-O2 -march=x86-64-v3" } */
extern union {
int i;
float f;
} int_as_float_u;
extern int render_result_from_bake_w;
extern int render_result_from_bake_h_seed_pass;
extern float *render_result_from_bake_h_primitive;
extern float *render_result_from_bake_h_seed;
float
int_as_float(int i)
{
int_as_float_u.i = i;
return int_as_float_u.f;
}
void
render_result_from_bake_h(int tx)
{
while (render_result_from_bake_w) {
for (; tx < render_result_from_bake_w; tx++)
render_result_from_bake_h_primitive[1] =
render_result_from_bake_h_primitive[2] = int_as_float(-1);
if (render_result_from_bake_h_seed_pass) {
*render_result_from_bake_h_seed = 0;
}
}
}