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RISC-V: Add ashiftrt operand 2 for vector avg_floor and avg_ceil

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According to the semantics of the avg_floor and avg_ceil as below:

floor: op0 = (narrow) (((wide) op1 + (wide) op2) >> 1);
ceil:  op0 = (narrow) (((wide) op1 + (wide) op2 + 1) >> 1);

Aka we have (const_int 1) as the op2 of the ashiftrt but seems missed.
Thus, add it back to align the definition.

The below test suites are passed for this patch.
* The rv64gcv fully regression test.

gcc/ChangeLog:

	* config/riscv/autovec.md: Add (const_int 1) as the op2 of
	ashiftrt.

Signed-off-by: Pan Li <pan2.li@intel.com>
This commit is contained in:
Pan Li
2025-07-19 17:17:11 +08:00
parent 1e005687dd
commit c655047d3d
1 changed files with 4 additions and 2 deletions
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6
gcc/config/riscv/autovec.md
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@ -2489,7 +2489,8 @@
(sign_extend:VWEXTI
(match_operand:<V_DOUBLE_TRUNC> 1 "register_operand"))
(sign_extend:VWEXTI
(match_operand:<V_DOUBLE_TRUNC> 2 "register_operand"))))))]
(match_operand:<V_DOUBLE_TRUNC> 2 "register_operand")))
(const_int 1))))]
"TARGET_VECTOR"
{
insn_code icode = code_for_pred (UNSPEC_VAADD, <V_DOUBLE_TRUNC>mode);
@ -2522,7 +2523,8 @@
(match_operand:<V_DOUBLE_TRUNC> 1 "register_operand"))
(sign_extend:VWEXTI
(match_operand:<V_DOUBLE_TRUNC> 2 "register_operand")))
(const_int 1)))))]
(const_int 1))
(const_int 1))))]
"TARGET_VECTOR"
{
insn_code icode = code_for_pred (UNSPEC_VAADD, <V_DOUBLE_TRUNC>mode);