Zenghui Yu e6da704b71 hvf: arm: Emulate ICC_RPR_EL1 accesses properly ...

Commit a2260983c6 ("hvf: arm: Add support for GICv3") added GICv3 support
by implementing emulation for a few system registers. ICC_RPR_EL1 was
defined but not plugged in the sysreg handlers (for no good reason).

Fix it.

Fixes: a2260983c6 ("hvf: arm: Add support for GICv3")
Signed-off-by: Zenghui Yu <zenghui.yu@linux.dev>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250714160139.10404-3-zenghui.yu@linux.dev
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

2025-07-21 11:20:13 +01:00

..

alpha

target/alpha: Add GDB XML feature file

2025-07-14 11:42:49 +01:00

arm

hvf: arm: Emulate ICC_RPR_EL1 accesses properly

2025-07-21 11:20:13 +01:00

avr

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hexagon

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hppa

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i386

i386/tdx: Remove the redundant qemu_mutex_init(&tdx->lock)

2025-07-17 17:18:59 +02:00

loongarch

target/qmp: Use target_cpu_type()

2025-07-15 02:56:39 -04:00

m68k

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microblaze

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mips

Merge tag 'mips-20250715' of https://github.com/philmd/qemu into staging

2025-07-16 07:06:14 -04:00

openrisc

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ppc

qemu: Declare all load/store helper in 'qemu/bswap.h'

2025-07-15 02:56:39 -04:00

riscv

qemu: Declare all load/store helper in 'qemu/bswap.h'

2025-07-15 02:56:39 -04:00

rx

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s390x

target/s390x: Have s390_cpu_halt() not return anything

2025-07-11 10:33:56 +02:00

sh4

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sparc

gdbstub: add the GDB register XML files for sparc64.

2025-07-14 11:42:49 +01:00

tricore

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xtensa

target/xtensa: replace FSF postal address with licenses URL

2025-06-26 00:42:37 +02:00

Kconfig

target/cris: Remove the deprecated CRIS target

2024-09-13 20:11:13 +02:00

meson.build

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