From 1e005687dd6e86aefac0455a1ba1ecea65302285 Mon Sep 17 00:00:00 2001
From: GCC Administrator <gccadmin@gcc.gnu.org>
Date: Sun, 20 Jul 2025 00:17:36 +0000
Subject: [PATCH] Daily bump.

---
 gcc/ChangeLog           | 34 ++++++++++++++++++++++++++++++++++
 gcc/DATESTAMP           |  2 +-
 gcc/testsuite/ChangeLog | 22 ++++++++++++++++++++++
 3 files changed, 57 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a75b0c8052b..12b0d90c48a 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,37 @@
+2025-07-19  Dimitar Dimitrov  <dimitar@dinux.eu>
+
+	PR target/121124
+	* config/pru/pru-pragma.cc (pru_pragma_ctable_entry): Handle the
+	ctable base address as signed 32-bit value, and sign-extend to
+	HOST_WIDE_INT.
+	* config/pru/pru-protos.h (struct pru_ctable_entry): Store the
+	ctable base address as signed.
+	(pru_get_ctable_exact_base_index): Pass base address as signed.
+	(pru_get_ctable_base_index): Ditto.
+	(pru_get_ctable_base_offset): Ditto.
+	* config/pru/pru.cc (pru_get_ctable_exact_base_index): Ditto.
+	(pru_get_ctable_base_index): Ditto.
+	(pru_get_ctable_base_offset): Ditto.
+	(pru_print_operand_address): Ditto.
+
+2025-07-19  Paul-Antoine Arras  <parras@baylibre.com>
+
+	PR target/119100
+	* config/riscv/autovec-opt.md (*vfwnmacc_vf_<mode>): New pattern.
+	(*vfwnmsac_vf_<mode>): New pattern.
+	* config/riscv/riscv.cc (get_vector_binary_rtx_cost): Add support for a
+	vec_duplicate in a neg.
+
+2025-07-19  Artemiy Volkov  <artemiyv@acm.org>
+
+	* config/riscv/riscv.cc (riscv_macro_fusion_pair_p): Protect
+	from a NULL PREV_SET or CURR_SET.
+
+2025-07-19  Georg-Johann Lay  <avr@gjlay.de>
+
+	* config/avr/avr-passes.cc (avr_optimize_casesi): Fuse
+	get_insns() with end_sequence().
+
 2025-07-18  Pan Li  <pan2.li@intel.com>
 
 	* config/riscv/autovec.md (avg<mode>3_ceil): Add new pattern
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index c64e4865ca8..eafd44957d2 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20250719
+20250720
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index ad467e69abe..affea652519 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,25 @@
+2025-07-19  Dimitar Dimitrov  <dimitar@dinux.eu>
+
+	PR target/121124
+	* gcc.target/pru/pragma-ctable_entry-2.c: New test.
+
+2025-07-19  Paul-Antoine Arras  <parras@baylibre.com>
+
+	PR target/119100
+	* gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f16.c: Add vfwnmacc and
+	vfwnmsac.
+	* gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f32.c: Likewise.
+	* gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f16.c: Likewise.
+	* gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f32.c: Likewise.
+	* gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f16.c: Likewise.
+	* gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f32.c: Likewise.
+	* gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f16.c: Likewise.
+	* gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f32.c: Likewise.
+	* gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmacc-run-1-f16.c: New test.
+	* gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmacc-run-1-f32.c: New test.
+	* gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmsac-run-1-f16.c: New test.
+	* gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmsac-run-1-f32.c: New test.
+
 2025-07-18  Harald Anlauf  <anlauf@gmx.de>
 
 	PR fortran/121145